1. Field of the Invention
This invention relates to an electronic timepiece, and more particularly to an electronic timepiece having a circuit for setting critical voltage level of a battery and/or frequency dividing ratio of the timepiece.
2. Description of the Prior Art
Recently, integrated circuits of low power consumption have been developed for use in electronic timepieces as they have been popularized, and it has become possible to provide electronic timepieces having a longer battery lifetime. However, it has conversely been difficult for users of such timepieces to memorize the time at which the battery should be changed. As a result, there have been proposed and popularized electronic timepieces with an indicator for battery lifetime.
An example of battery voltage detecting devices according to the prior art is shown in FIG. 1 of the accompanying drawings. This battery voltage detecting device comprises a detection level setting means 10 which may consist of a variable adjusting resistor R and a voltage level detecting circuit 11 which consists of an enhancement type N-MOS transistor 11a to be used for level detection and a data type flip-flop (hereinafter referred to as "data-type FF") 11b to be used for data memorization. The detection level setting means 10 and the voltage level detecting circuit 11 are connected in series between the terminal V.sub.DD of a voltage supply source and the grounded terminal V.sub.SS. The data terminal D of the data type FF 11b is connected to the junction A between the adjusting resistor R and the N-MOS transistor 11a, and the gate terminal of the N-MOS transistor 11a and the clock terminal CL of the data type FF 11b are connected to a sampling terminal SP.
In the circuit as above explained, the data type FF 11b is a C-MOS of master-slave construction in which the detection level of the data terminal D is always at the voltage V.sub.DD /2 and an output of this level at the data terminal D is generated at the output terminal Q at the time of occurrence of the trailing edge of the sampling pulses supplied to the clock terminal CL of the data type FF 11b.
While no sampling pulse is supplied to the sampling terminal SP, the transistor 11a is non-conductive, so that the electric potential V.sub.A at the junction A is equal to the voltage V.sub.DD of the voltage supply source. When the sampling pulses are supplied to the sampling terminal SP, the transistor 11a becomes conductive with the result that current will flow therethrough, so that the electric potential V.sub.A falls due to a voltage drop across the adjusting resistor R. As a result, if the voltage level or the electric potential V.sub.A is lower than the voltage V.sub.DD /2, an output "0" will come out of the output terminal Q of the data-type FF 11b at the time of the retailing edge of the sampling pulses, while if the voltage level is higher than the voltage V.sub.DD /2, an output "1" comes out likewise. These outputs are maintained until a detecting operation is performed by the following sampling pulse.
The operating level of the voltage level detecting circuit 11 is set in such a manner that, as the level of the potential V.sub.A at the junction A, when sampled, changes dependently upon the voltage V.sub.DD of the voltage supply source and the value of the adjusting resistor R, the adjusting resistor R is regulated so that the level of the potential V.sub.A will be equal to the voltage V.sub.DD /2 under the condition that the supply voltage between the terminals V.sub.DD and V.sub.SS is set to the voltage (for example 1.4 volts) to be detected. In this prior art example, the operating level lowers as the value of the adjusting resistor R becomes higher.
In this manner, an output "0" comes out of the output terminal Q of the data type FF 11b while the voltage supplied between the terminals V.sub.DD and V.sub.SS is higher than the voltage 1.4 volts while an output "1" comes out of the output terminal Q when the voltage between those terminals reaches the voltage 1.4 volts.
However, in the conventional battery voltage detecting device as above-mentioned, the adjusting resistor R is selectively connected outside of the integrated circuit and is not expedient from the standpoint of space required for mounting such resistor and its cost. Then, it is the recent tendency of battery voltage detecting device to employ the structure wherein a plurality of adjustable resistors are provided for setting voltage level in the integrated circuit and are set by a plurality of outside terminals.
In order to set the voltage level by the plurality of outside setting terminals as above-mentioned, switches provided correspondingly to the outside terminals or a method of soldering the outside terminals to the terminal V.sub.DD or V.sub.SS on the circuit pattern of a circuit board must be relied upon. However, provision of those switches requires too much space and the soldering method may cause damages onto the outside terminals or the circuit pattern on the circuit board when these outside terminals are subjected to soldering process successively. If many outside terminals are used, it will take much more time to find out an appropriate setting level and thus the soldering method was not desirable from the standpoint of higher cost and lower quality.